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 MM74C157 Quad 2-Input Multiplexers
October 1987 Revised January 1999
MM74C157 Quad 2-Input Multiplexers
General Description
The MM74C157 multiplexers are monolithic complementary MOS (CMOS) integrated circuits constructed with Nand P-channel enhancement transistors. They consist of four 2-input multiplexers with common select and enable inputs. When the enable input is at logical "0" the four outputs assume the values as selected from the inputs. When the enable input is at logical "1", the outputs assume logical "0". Select decoding is done internally resulting in a single select input only.
Features
s Supply voltage range: s High noise immunity: 3V to 15V 0.45 VCC (typ.) Drive 2 LPTTL loads s Low power: 50 nW (typ.) s Tenth power TTL compatible:
Ordering Code:
Order Number MM74C157N Package Number N16E Package Description 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
Connection Diagram
Pin Assignments for DIP
Logic Diagram
Top View
Truth Table
Enable 1 0 0 0 0 Select X 0 0 1 1 A X 0 1 X X B X X X 0 1 Output Y 0 0 1 0 1
(c) 1999 Fairchild Semiconductor Corporation
DS005894.prf
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MM74C157
Absolute Maximum Ratings(Note 1)
Voltage at Any Pin Operating Temperature Range Storage Temperature Range Maximum VCC Voltage Power Dissipation (PD) Dual-In-Line Small Outline 700 mW 500 mW -0.3V to VCC + 0.3V -40C to +85C -65C to +150C 18V
Operating VCC Range Lead Temperature (Soldering, 10 seconds)
3V to 15V
260C
Note 1: "Absolute Maximum Ratings" are those values beyond which the safety of the device cannot be guaranteed. Except for "Operating Temperature Range" they are not meant to imply that the devices should be operated at these limits. The table of "Electrical Characteristics" provides conditions for actual device operation.
DC Electrical Characteristics
Min/Max limits apply across temperature range unless otherwise noted Symbol CMOS TO CMOS VIN(1) VIN(0) VOUT(1) VOUT(0) IIN(1) IIN(0) ICC VIN(1) VIN(0) VOUT(1) VOUT(0) ISOURCE ISOURCE ISINK ISINK Logical "1" Input Voltage Logical "0" Input Voltage Logical "1" Output Voltage Logical "0" Output Voltage Logical "1" Input Current Logical "0" Input Current Supply Current Logical "1" Input Voltage Logical "0" Input Voltage Logical "1" Output Voltage Logical "0" Output Voltage Output Source Current Output Source Current Output Sink Current Output Sink Current VCC = 5V VCC = 10V VCC = 5V VCC = 10V VCC = 5V VCC = 10V VCC = 5V VCC = 10V VCC = 15V VCC = 15V VCC = 15V VCC = 4.75V VCC = 4.75V VCC = 4.75V, IO = -360 A VCC = 4.75V, IO = 360 A VCC = 5V, VIN(0) = 0V TA = 25C, VOUT = 0V VCC = 10V, VIN(0) = 0V TA = 25C, VOUT = 0V VCC = 5V, VIN(1) = 5V TA = 25C, VOUT = VCC VCC = 10V, VIN(1) = 10V TA = 25C, VOUT = VCC 8.0 mA 1.75 mA -8.0 mA -1.75 2.4 0.4 VCC - 1.5 0.8 -1.0 0.005 -0.005 0.05 60 4.5 9.0 0.5 1.0 1.0 3.5 8.0 1.5 2.0 V V V V V V V V A A A V V V V mA Parameter Conditions Min Typ Max Units
CMOS TO TENTH POWER INTERFACE
OUTPUT DRIVE (See Family Characteristics Data Sheet) (Short Circuit Current)
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2
MM74C157
AC Electrical Characteristics
TA = 25C, CL = 50 pF, unless otherwise specified Symbol tpd0, tpd1 tpd0, tpd1 tpd0, tpd1 CIN CPD Parameter Propagation Delay from Data to Output Propagation Delay from Select to Output Propagation Delay from Enable to Output Input Capacitance Power Dissipation Capacitance
(Note 2)
Conditions VCC = 5.0V VCC = 10V VCC = 5V VCC = 10V VCC = 5V VCC = 10V (Note 3) (Note 4) Min Typ 150 70 180 80 180 80 5 20 Max 250 110 300 130 300 130 Units ns ns ns ns ns ns pF pF
Note 2: AC Parameters are guaranteed by DC correlated testing. Note 3: Capacitance is guaranteed by periodic testing. Note 4: CPD determines the no load AC power consumption of any CMOS device. For complete explanation, see Family Characteristics, Application Note AN-90.
Typical Applications
74L Compatibility Guaranteed Noise Margin as a Function of VCC
3
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MM74C157 Quad 2-Input Multiplexers
Physical Dimensions inches (millimeters) unless otherwise noted
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001. 0.300" Wide Package Number N16E
LIFE SUPPORT POLICY FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 2. A critical component in any component of a life support 1. Life support devices or systems are devices or systems device or system whose failure to perform can be reawhich, (a) are intended for surgical implant into the sonably expected to cause the failure of the life support body, or (b) support or sustain life, and (c) whose failure device or system, or to affect its safety or effectiveness. to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the www.fairchildsemi.com user.
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications.


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